ICT Annual Symposium 2007.
The 33rd Annual Symposium of the Institute of Circuit Technology was held on 20th September 2007 at the National Physical Laboratory. ICT Technical Director Bill Wilkie welcomed delegates, commenting that the membership list continued to grow and that the increasing proportion of younger members was an encouraging trend for the future.
Dr Chris Hunt began the proceedings with an update on current NPL projects, particularly relevant being the compilation by the Electronics Interconnection Group of an online Defects Database, the objective being to make defect information available to assist engineers to implement corrective actions in their process or design. He invited delegates to contribute to the survey, making it clear that examples would be presented in an anonymous format for the benefit of the industry as a whole.
The keynote paper, on Future Trends in Interconnection Technology, was given by Professor Martin Goosey, Industrial Director of the Innovative Electronics Manufacturing Research Centre based at University of Loughborough. Thirty projects were currently being coordinated by IEMRC, many of which related to advanced interconnection device technologies. Moore’s Law still continued to hold, the number of transistors on a chip doubling every two years, and it was projected that by 2010 devices working at 10GHz with billions of transistors would be available. Packaging was evolving into a nano-scale of dimensions, and the System-in-Package concept was becoming mainstream technology. Challenges for the printed circuit industry were not only in the provision of interconnection solutions for increasingly complex devices and packages, but also in environmental compliance. Possible directions included buried components, both passive and active, and embedded waveguides. The integrated optical and electrical interconnected printed circuit board, designated OPCB, was a major area of interest within IEMRC with work proceeding on the development of design rules and cost-effective production methods. From an environmental perspective, sonochemical techniques offered ways of preparing surfaces for metallisation using acoustic cavitation rather than aggressive chemistry. IEMRC’s future programme included the evaluation of carbon nanotubes as means of creating nanoconnections and making optically transparent conductors.
Karl Miles of Goepel Electronic gave an insight into the testing of devices and assemblies by boundary-scan techniques. Boundary scan testing was developed as the JTAG (Joint Test Action Group) interface to solve physical access problems on increasingly crowded assemblies, using test circuitry embedded at chip level, and could be used to access even the most complex assemblies for testing, debugging and in-system device programming and for diagnosing hardware problems. The need for physical test points on the board was eliminated or greatly reduced, leading to savings as a result of simpler board layouts, less costly test fixtures and reduced time on in-circuit test systems. Access to the electronics was via a standardised 4-wire or 5-wire serial interface, allowing test clock, test mode select and test data input signals to be connected whilst test data output was collected. The technique was also very effective for HALT, HASS and ESS testing because the simple interface enabled straightforward connection to an assembly within an environmental chamber.
Martyn Gaudion of Polar Instruments explained with very clear illustrations how loss is becoming a key parameter which PCB designers need to understand. Until recently, the main area of concern with transmission lines had been reflection, but for the future the management of the “loss budget” would become increasingly important. As frequencies increased, loss occurred progressively in both copper and dielectric. In a copper conductor, a high frequency signal was effectively carried not in the bulk material, but in its surface layer, as a “skin effect”. As conductor geometries became finer, the skin effect became more pronounced and surface roughness, such as produced by bonding treatment during laminate manufacture, contributed increasingly to signal loss. Dielectric loss was convincingly demonstrated by observing how FR4 material could be very easily heated-up in a microwave oven, whereas low-loss materials stayed cool in similar conditions. Several routes were open to the designer to reduce loss, but generally resulted in increased cost, and there was a strong case for better communication between designer and fabricator. Tools were becoming available for predicting loss, and an IPC committee was working on the development of standardised test methods.
Dennis Price of Merlin Circuits reviewed trends in flex-rigid PCB manufacture. Whereas flex-rigids had traditionally been tooexpensive to use for other than mission-critical and aerospace products, they were now finding increasing application in computers and mobile phones, and substantial growth was forecast in automotive, industrial and consumer sectors. BPA figures indicated that the world market for flexible circuits was US$ 7.8 Bn in 2006, of which 7.3% was flex-rigid, and would grow to US$ 11.2 Bn by 2012. Low-cost flex-rigid constructions had been developed which avoided the need for expensive polyimide materials by using depth-routed FR4 with flexible solder mask in the bend area. Circuits of this type could be processed through normal rigid-multilayer production facilities with standard desmear processes. Alternatively a wide range of semi-flexible core materials was available where tighter bend-radii were required. A novel low-cost construction, developed by Ruwel using copper foil selectively coated with a flexible polymer as the precursor of the bend area, offered extremely good dynamic flexibility at bend radius as small as 1mm.
Bob Willis recounted some experiences of the assembly of flexible circuits using lead-free soldering processes, both convection and vapour-phase. He stressed the importance of good pallet design and highlighted many practical details, particularly the significance of thermal mass, proper support of the circuit whilst avoiding stress or distortion, and the provision of effective drainage for vapour-phase fluid. He discussed aspects of stencil design, choice of solder paste, printing parameters, component placement and the thermal profiling of convection and vapour phase systems, then showed the results of live experiments which had been conducted at Nepcon and Productronica workshops. He described a simple in-process test for wettability which could easily be incorporated into the design of every assembly, consisting of a pattern of dummy conductor strips upon which were printed dots of solder paste at decreasing spacing. Observing to what extent the dots coalesced during reflow gave a meaningful indication of wettabilty of the solderable finish.
Len Pillinger, Certification Manager for BSI Product Services, reviewed the evolution and obsolescence of traditional capability approvals, and explored ways in which BSI could provide certification relevant to the future needs of the industry. He reported the results of a survey conducted to determine the awareness of the UK printed circuit industry to the IPC standards IPC-A-600G and the IPC-6011 series, A-600 being a basic workmanship standard and the 6011 series being analogous to MIL spec, more rigorous than previous BS/CECC standards. The survey indicated a polarisation of the industry, with the high-reliability market at one extreme and the commercial market at the other, and little in-between. There was a general awareness of IPC-A-600 across the industry both by fabricators and their customers, but less for IPC-6011, and it was clear that different levels of certification were required to satisfy the needs of different market sectors. BSI proposed two separate approvals, a “kitemark” system based on IPC-A-600 for commercial applications and an IEC/IECQ-CECC system based on IPC-6011 for high-reliability applications, and it was expected that these would be generated during the coming year.
Mike Inman, Scheme Manager from BSI Product Services, gave an introductory overview of the onerous implications for the electronics industry of European Union REACh legislation. REACh was a “regulation” rather than a “directive”, meaning that it became law as soon as it was implemented in June 2007, and its stated objectives were to achieve better human health, a cleaner environment and a more sustainable European chemical industry. The regulation replaced 42 pieces of existing legislation, whilst citing many other directives and legislation, and was estimated to apply to 100,000 “substances”, each of which would eventually have to be registered, evaluated and authorised. Companies would have to provide information on all substances they wished to produce or import in quantities of at least 1 tonne per year.
This information would be stored in a central database managed by a European Chemicals Agency based in Finland, and data not covered by industrial confidentiality would be accessible to the public and downstream users. This data would include the toxicological and ecotoxicological properties of the substance, proposals for labelling, instructions for use, etc. Given the large number of existing substances, registration would be performed in tiers over a period of 11 years. Substances of high tonnage, and substances of very high toxicity, would necessitate the most data and would be registered first. BSI could offer guidance and training in developing REACh strategies.
Continuing on the theme of EU legislation, this time with reference to the WEEE directive, Martin Wickham from National Physical laboratory reported progress of a project to determine the practicability of unreinforced thermoplastics as printed circuit substrates, with re-usability and recyclability of materials as the objective. An estimated 85% of PCB scrap currently went to landfill, because once metals had been recovered, little could be done to salvage anything useful from reinforced thermoset laminates. Polyetherimide, as used in the production of moulded circuits, had been used as substrate for the trials, although several other thermoplastic materials were available. Panels had been drilled, electroless plated, electroplated, imaged, etched and finished as printed circuit boards. Because of the sensitivity of polyetherimide to soldering temperatures, conductive adhesives had been used for assembly and low-resistance joints had been achieved. Test assemblies had shown low levels of failure on thermal cycling, the resilience of the conductive adhesive compensating for the thermal expansion mismatch between substrate and components. Encouraging results had also been observed on assemblies built with a low-melting tin-bismuth solder. Much work remained to be done on establishing procedures and infrastructure for recycling the thermoplastic material, and the project was ongoing.
The 33rd ICT Annual Symposium provided not only a forum for the dissemination of knowledge of printed circuit and related technologies, but also a busy table-top exhibition area and excellent opportunities for delegates to network with their peers. A very successful event: Bill Wilkie thanked delegates for their attention and exhibitors for their support, and acknowledged the cooperation of National Physical Laboratory in providing a superb venue and facilities.
Pete Starkey
ICT Council
September 2007